1. Field of the Invention
The present invention relates to a technology for detecting an anomaly state such as clock disturbance in a digital circuit that operates based on a clock provided from an external oscillator.
2. Description of the Related Art
As a conventional technology for detecting anomaly of a clock, there is a method shown in FIG. 1, for example. In this method, presence or absence of a clock edge within a predetermined monitoring period is monitored. When no clock edge is found in the monitoring period, it is determined that clock interruption occurs so as to output an alarm. After that, when at least a clock edge is found within the monitoring period, the alarm is released.
FIG. 2 shows an example of a circuit for realizing this clock anomaly detection method. FIG. 3 shows an operation time chart of the circuit. This circuit includes an FF (flip-flop) 1, an FF 2, an FF 3, and an OR circuit 4. An interruption detection target clock is received by a CL terminal of the FF 1, and an inversion of the interruption detection target clock is received by a CL terminal of the FF 2. D terminals of the FF 1 and the FF 2 always receive H level and CK clocks receives a monitoring timer signal.
As shown in FIG. 3, when the interruption detection target clock is normal, output values of the FF 1 and the FF 2 are always cleared. Therefore, outputs of the FF 1 and the FF 2 become L even when the monitoring timer is H. After the interruption detection target clock is interrupted (at A point), the outputs of the FF 1 and the FF 2 are not cleared by the interruption detection target clock. Thus, when the monitoring timer becomes H, H is held. In addition, when the monitoring timer becomes H at the time of B, output of the FF 3 becomes H so that an alarm is output. After that, when the interruption detection target clock is restored, outputs of the FF 1 and the FF 2 become L, and the output of FF 3 becomes L at a time when the monitoring timer becomes H next, so that alarm output stops. Clock interruption detection can be performed according to such operation.
There are following two documents: a patent document 1 and a patent document 2 as prior art on anomaly detection of a clock.
[Patent document 1] Japanese Laid-Open Patent Application No. 09-244761
[Patent document 2] Japanese Laid-Open Patent Application No. 11-355110
In the above-mentioned conventional technology, anomaly can be detected only when any clock edge is not detected within the monitoring period, and clock interruption within a shorter period and clock disturbance that is an metastable state of clock period cannot be detected. Therefore, in the conventional technology, when there occurs an anomaly due to clock disturbance, there is a problem in that it takes long time to specify whether the anomaly is caused by a problem in a clock system.